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RM0008
a)
b)
Flexible static memory controller (FSMC)
This situation occurs when a byte access is requested to a 16-bit wide Flash
memory. Clearly, the device cannot be accessed in byte mode (only 16-bit words
can be read from/written to the Flash memory) therefore:
Write transactions are not allowed
Read transactions are allowed (the controller reads the entire 16-bit memory word
and uses the needed byte only).
Configuration registers
The FSMC can be configured using a register set. See Section 19.5.6 , for a detailed
description of the NOR Flash/PSRAM controller registers. See Section 19.6.7 , for a detailed
description of the NAND Flash/PC Card registers.
19.4
External device address mapping
From the FSMC point of view, the external memory is divided into 4 fixed-size banks of 256
Mbytes each (Refer to Figure 161 ):
●
●
●
Bank 1 used to address up to 4 NOR Flash or PSRAM memory devices. This bank is
split into 4 NOR/PSRAM regions with 4 dedicated Chip Select.
Banks 2 and 3 used to address NAND Flash devices (1 device per bank)
Bank 4 used to address a PC Card device
For each bank the type of memory to be used is user-defined in the Configuration register.
Figure 161. FSMC memory banks
Address
6000 0000h
Banks
Bank 1
Supported memory type
NOR / PSRAM
4 × 64 MB
6FF F FFF Fh
7000 0000h
Bank 2
4 × 64 MB
7FF F FFF Fh
NAND Flash
8000 0000h
Bank 3
4 × 64 MB
8FF F FFF Fh
9000 0000h
Bank 4
PC Card
4 × 64 MB
9FF F FFF Fh
ai14719
Doc ID 13902 Rev 9
411/995
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